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I bought my first FPGA to see if this old software dog can still learn new tricks.
FPGAs are like a huge breadboard full of discrete logic gates that you wire together to create a custom circuit.
At power-on it reads your configuration and becomes that circuit.
At power-on it reads your configuration and becomes that circuit.
It& #39;s like a custom chip that can be changed with every run, but in a fundamentally different way than a microprocessor running software.
A circuit is described in a Hardware Description Language (e.g. Verilog) that is then "synthesized" into a "bitstream" that the FPGA loads at startup.
Kind of like how a C program is compiled to machine code, read by a microprocessor.
Kind of like how a C program is compiled to machine code, read by a microprocessor.
I got the open source iCEBeaker dev board with a Lattice iCE40 FPGA.
https://1bitsquared.com/products/icebreaker">https://1bitsquared.com/products/...
https://1bitsquared.com/products/icebreaker">https://1bitsquared.com/products/...
This industry is still very much about closed designs, heavy-weight proprietary devtools and vendor lock-in. It feels like the software industry from the 90s.
The iCE40 is one a few FPGAs fully supported by open source tooling, thanks to reverse engineering. https://www.reddit.com/r/ECE/comments/2zwy3a/ice40_fpga_bitstream_format_reverse_engineered/">https://www.reddit.com/r/ECE/com...
To a software developer an FPGA is excruciatingly low-level. No data types, no loops and no sequential execution. All statements run in parallel to all other statements.
Hooked it up my custom LED matrix display to try and draw some pixels.
Drawing a circle? No floating points and no math functions for you.
I created hardwired sine/cosine lookup tables and scaled up all numbers to large integers.
The low display resolution helps with low precision :)
I created hardwired sine/cosine lookup tables and scaled up all numbers to large integers.
The low display resolution helps with low precision :)
If you can describe a vector, you can bounce a ball.
And if you have a bouncing ball, maybe that can be turned into a dedicated circuit playing Pong. https://www.youtube.com/watch?v=fhd7FfGCdCo">https://www.youtube.com/watch...
Self-imposed challenge accepted.
Rotary encoders arrived and I took a stab at creating some paddle and collision circuitry. Seems to work!
Doing this in hardware really takes some getting used to. Testing even more so.
This is my debugger now
https://abs.twimg.com/emoji/v2/... draggable="false" alt="😬" title="Grimasse schneidendes Gesicht" aria-label="Emoji: Grimasse schneidendes Gesicht">
This is my debugger now
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Now you wouldn& #39;t normally put game logic into hardware. It is often complex and evolves over time as features are added, which is impossible in silicon/ASIC.
And fixing a bug means creating a new chip.
And fixing a bug means creating a new chip.
Complex game logic is better done in software on a general purpose microprocessor.
But refreshing a million pixels at 200Hz with precise timing, or even just playing audio benefits from special purpose silicon.
But refreshing a million pixels at 200Hz with precise timing, or even just playing audio benefits from special purpose silicon.
On a CPU you would use interrupts or a real time OS scheduler to perform timing sensitive parallel work while pausing everything else.
On an FPGA or ASIC each task is an independent, dedicated circuit, each running in parallel at full speed.
On an FPGA or ASIC each task is an independent, dedicated circuit, each running in parallel at full speed.
It& #39;s great for implementing high speed protocols, display drivers, video compression, 3D shaders, hash functions (crypto currencies), etc.
This project is actually part of a more ambitious goal. To see if I could design a custom chip by myself and then have it manufactured for real. A proper ASIC.
Chip design and manufacturing is another layer of the stack I know nothing about. The software industry is really far removed from it. You don& #39;t get any exposure to it.
If you want to teach yourself to code there& #39;s an absolute abundance of free materials and tools, and writing code itself requires nothing more than an ordinary computer.
Those getting into electronics can draw from an enormous worldwide maker community, cheap PCB manufacturers, ubiquitous microcontrollers and open source tools for nearly everything.
Chip design and manufacturing is much less accessible though.
Turning a hardware design into an ASIC involves proprietary tools and foundry-specific, closed development kits and a ton of money.
Turning a hardware design into an ASIC involves proprietary tools and foundry-specific, closed development kits and a ton of money.
To create a manufacturable design you need access to a foundry& #39;s PDK and library of standard cells, not accessible to hobbyists.
This industry is nothing like the modern world of open source, sadly. https://en.m.wikipedia.org/wiki/Process_design_kit">https://en.m.wikipedia.org/wiki/Proc...
This industry is nothing like the modern world of open source, sadly. https://en.m.wikipedia.org/wiki/Process_design_kit">https://en.m.wikipedia.org/wiki/Proc...
Until a very recent development.
The Minnesota based @SkyWaterFoundry foundry teamed up with Google to develop the first(?) open source PDK for Skywater& #39;s 130nm process technology. https://github.com/google/skywater-pdk">https://github.com/google/sk...
The Minnesota based @SkyWaterFoundry foundry teamed up with Google to develop the first(?) open source PDK for Skywater& #39;s 130nm process technology. https://github.com/google/skywater-pdk">https://github.com/google/sk...
Now @efabless offers a free shuttle to have any truly open source, Skywater PDK-based ASIC design manufactured, currently at Google& #39;s expense.
https://efabless.com/open_shuttle_program">https://efabless.com/open_shut...
https://efabless.com/open_shuttle_program">https://efabless.com/open_shut...
All designs must be open source and published in GitHub repos.
Not entirely clear what Google& #39;s motivation is, but if this could ultimately do for chip design what open source did for the software industry, it would be huge! https://twitter.com/whitequark/status/1364168937253003266?s=09">https://twitter.com/whitequar...
They& #39;ve done one shuttle run so far, with the second currently open.
This is an unusually great opportunity to test the waters of chip design and so I went for it!
https://www.fossi-foundation.org/2020/06/30/skywater-pdk">https://www.fossi-foundation.org/2020/06/3...
This is an unusually great opportunity to test the waters of chip design and so I went for it!
https://www.fossi-foundation.org/2020/06/30/skywater-pdk">https://www.fossi-foundation.org/2020/06/3...
. @matthewvenn of @YosysHQ has created a paid course specifically around the efabless shuttle, making the barrier to entry even lower. https://www.zerotoasiccourse.com/contact/ ">https://www.zerotoasiccourse.com/contact/&...
So here I am, trying to design an IC!
Having absolutely no clue as to what might be achievable for someone without any experience, it would now appear that Pong in pure silicon might be doablehttps://abs.twimg.com/emoji/v2/... draggable="false" alt="🙂" title="Leicht lächelndes Gesicht" aria-label="Emoji: Leicht lächelndes Gesicht">
Having absolutely no clue as to what might be achievable for someone without any experience, it would now appear that Pong in pure silicon might be doable
" title="So here I am, trying to design an IC!Having absolutely no clue as to what might be achievable for someone without any experience, it would now appear that Pong in pure silicon might be doable https://abs.twimg.com/emoji/v2/... draggable="false" alt="🙂" title="Leicht lächelndes Gesicht" aria-label="Emoji: Leicht lächelndes Gesicht">" class="img-responsive" style="max-width:100%;"/>
