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Tuning into TSMC& #39;s Technology Symposium today, OIP Ecosystem Forum tomorrow. Not allowed to share screen shots, so will be very text-laden. Odd, but I will follow the rules.
. @reneejo from @AmpereComputing first partner on-stage. She& #39;s giving a bit of a commercial on the company& #39;s processors and why they chose TSMC. I don& #39;t know what other bleeding-edge options Ampere had, but OK. Says have their 5nm test chip "running through fab."
TSMC N7 "7"nm:
-140 designs, 200 EOY
-1B shipped
-splits: 1/Networking, 2/ CPU/GPU, 3/ 5G, 4/ Other, 6/ AI
-140 designs, 200 EOY
-1B shipped
-splits: 1/Networking, 2/ CPU/GPU, 3/ 5G, 4/ Other, 6/ AI
TSMC N5 claims:
-15% faster, 30% lower power, 1.8X density versus N7
-N5P adds 5% speed, 10% better power
-15% faster, 30% lower power, 1.8X density versus N7
-N5P adds 5% speed, 10% better power
TSMC N4 claims:
-extension of N5
-mask layer reduction
-straightforward N5 migration
-Q4/21 risk start
-2022 volume
-extension of N5
-mask layer reduction
-straightforward N5 migration
-Q4/21 risk start
-2022 volume
TSMC N3 claims:
-FinFET based
-full 3nm scaling
-mobile and HPC
-2021 risk production
-2H22 volume prod
-Versus N5 V1 (+10-15% speed, -25-30% power, 1.7x logic density, 1.2x SRAM density, 1.1x analog density)
-FinFET based
-full 3nm scaling
-mobile and HPC
-2021 risk production
-2H22 volume prod
-Versus N5 V1 (+10-15% speed, -25-30% power, 1.7x logic density, 1.2x SRAM density, 1.1x analog density)
