Here is a new AMD patent list, featuring some of the latest advances developed by AMD in architecture, graphics, packages and more.
Follow the thread! (1/6)
Follow the thread! (1/6)
Patent: Bandwidth saving architecture for scalable video coding - AMD
"(...)The present invention enabling the use of the same or similar code base on CPU and GPU processors, facilitating the debugging of such code bases" -> Great for APUs!
More details: http://www.freepatentsonline.com/20200112731.pdf ">https://www.freepatentsonline.com/202001127...
"(...)The present invention enabling the use of the same or similar code base on CPU and GPU processors, facilitating the debugging of such code bases" -> Great for APUs!
More details: http://www.freepatentsonline.com/20200112731.pdf ">https://www.freepatentsonline.com/202001127...
Patent: Real time on-chip texture decompression using shader processors - AMD
More details: http://www.freepatentsonline.com/20200118299.pdf ">https://www.freepatentsonline.com/202001182...
More details: http://www.freepatentsonline.com/20200118299.pdf ">https://www.freepatentsonline.com/202001182...
Patent: Matrix Multiplier With Submatrix Sequencing - AMD
An improvement in the method of multiplying large matrix in GPU, significantly reducing energy consumption.
More details: http://www.freepatentsonline.com/20200133991.pdf ">https://www.freepatentsonline.com/202001339...
An improvement in the method of multiplying large matrix in GPU, significantly reducing energy consumption.
More details: http://www.freepatentsonline.com/20200133991.pdf ">https://www.freepatentsonline.com/202001339...
Patent: Shared loads at compute units of a processor - AMD
Significant reduction in GPU communication traffic by employing a shared load scheme where each shared load retrieves data for multiple compute units.
More details: http://www.freepatentsonline.com/20200133868.pdf ">https://www.freepatentsonline.com/202001338...
Significant reduction in GPU communication traffic by employing a shared load scheme where each shared load retrieves data for multiple compute units.
More details: http://www.freepatentsonline.com/20200133868.pdf ">https://www.freepatentsonline.com/202001338...
Patent: Automatic configuration of knobs to optimize performance of a graphics pipeline - AMD
"A knob has a plurality of settings that configure a graphics pipeline."
More details: http://www.freepatentsonline.com/20200167985.pdf ">https://www.freepatentsonline.com/202001679...
"A knob has a plurality of settings that configure a graphics pipeline."
More details: http://www.freepatentsonline.com/20200167985.pdf ">https://www.freepatentsonline.com/202001679...
Patent: Pixel Wait Synchronization - AMD
More details: http://www.freepatentsonline.com/20200175642.pdf ">https://www.freepatentsonline.com/202001756...
More details: http://www.freepatentsonline.com/20200175642.pdf ">https://www.freepatentsonline.com/202001756...
Patent: Hint-based fine-grained dynamic voltage and frequency scaling in GPUs - AMD
DVFS for exascale GPUs...
More details: http://www.freepatentsonline.com/20200183485.pdf ">https://www.freepatentsonline.com/202001834...
DVFS for exascale GPUs...
More details: http://www.freepatentsonline.com/20200183485.pdf ">https://www.freepatentsonline.com/202001834...
Patent: Pipelined matrix multiplication at a graphics processing unit - AMD
Significant improvement in recurrent matrix multiplication operations for future AMD GPUs.
More details: http://www.freepatentsonline.com/20200183734.pdf ">https://www.freepatentsonline.com/202001837...
Significant improvement in recurrent matrix multiplication operations for future AMD GPUs.
More details: http://www.freepatentsonline.com/20200183734.pdf ">https://www.freepatentsonline.com/202001837...
Patent: Optimizing Primitive Shaders - AMD
Deferred vertex attribute shading... Finally!
More details: http://www.freepatentsonline.com/20200193703.pdf ">https://www.freepatentsonline.com/202001937...
Deferred vertex attribute shading... Finally!
More details: http://www.freepatentsonline.com/20200193703.pdf ">https://www.freepatentsonline.com/202001937...
Patent: Water tight ray triangle intersection without resorting to double precision - AMD
"The technique involves calculating barcentric coordinates and interpolating baricentric coordinates to obtain an intersection time."
More details: http://www.freepatentsonline.com/20200193685.pdf ">https://www.freepatentsonline.com/202001936...
"The technique involves calculating barcentric coordinates and interpolating baricentric coordinates to obtain an intersection time."
More details: http://www.freepatentsonline.com/20200193685.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Graphics texture footprint discovery - AMD
More details: http://www.freepatentsonline.com/20200193697.pdf ">https://www.freepatentsonline.com/202001936...
More details: http://www.freepatentsonline.com/20200193697.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Use of Workgroups in Pixel Shader - AMD
More details: http://www.freepatentsonline.com/20200193673.pdf ">https://www.freepatentsonline.com/202001936...
More details: http://www.freepatentsonline.com/20200193673.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Efficient data path for ray triangle intersection - AMD
"A technique for performing a hardware-accelerated ray-triangle intersection test where the hardware acceleration unit does not include a floating point division unit."
More details: http://www.freepatentsonline.com/20200193684.pdf ">https://www.freepatentsonline.com/202001936...
"A technique for performing a hardware-accelerated ray-triangle intersection test where the hardware acceleration unit does not include a floating point division unit."
More details: http://www.freepatentsonline.com/20200193684.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Robust Ray-triangle Intersection - AMD
More details: http://www.freepatentsonline.com/20200193683.pdf ">https://www.freepatentsonline.com/202001936...
More details: http://www.freepatentsonline.com/20200193683.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Variable rate rendering based on motion estimation - AMD
More details: http://www.freepatentsonline.com/20200169734.pdf ">https://www.freepatentsonline.com/202001697...
More details: http://www.freepatentsonline.com/20200169734.pdf ">https://www.freepatentsonline.com/202001697...
Patent: Apparatus and method for providing workload distribution of threads among multiple compute units - AMD
A fundamental patent in the development of EHP, further confirming the development of 3D-IC GPUs.
More details: http://www.freepatentsonline.com/20200192705.pdf ">https://www.freepatentsonline.com/202001927...
A fundamental patent in the development of EHP, further confirming the development of 3D-IC GPUs.
More details: http://www.freepatentsonline.com/20200192705.pdf ">https://www.freepatentsonline.com/202001927...
Patent: Mechanism for supporting discard functionality in a ray tracing context - AMD
More details: http://www.freepatentsonline.com/20200193681.pdf ">https://www.freepatentsonline.com/202001936...
More details: http://www.freepatentsonline.com/20200193681.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Merged data path for triangle and box intersection test in Ray Tracing - AMD
More details: http://www.freepatentsonline.com/20200193682.pdf ">https://www.freepatentsonline.com/202001936...
More details: http://www.freepatentsonline.com/20200193682.pdf ">https://www.freepatentsonline.com/202001936...
Patent: Variable Rate Shading - AMD
More details: http://www.freepatentsonline.com/20190066371.pdf ">https://www.freepatentsonline.com/201900663...
More details: http://www.freepatentsonline.com/20190066371.pdf ">https://www.freepatentsonline.com/201900663...
Patent: Raster Order View - AMD
FYI: Rasterizer Ordered Views allowing read/write access to resources without multisampling from multiple threads and without generating memory conflicts through the use of atomic functions.
More details: http://www.freepatentsonline.com/20200202815.pdf ">https://www.freepatentsonline.com/202002028...
FYI: Rasterizer Ordered Views allowing read/write access to resources without multisampling from multiple threads and without generating memory conflicts through the use of atomic functions.
More details: http://www.freepatentsonline.com/20200202815.pdf ">https://www.freepatentsonline.com/202002028...
Patent: Integration of variable rate shading and super-sample shading - AMD
More details: http://www.freepatentsonline.com/20200202594.pdf ">https://www.freepatentsonline.com/202002025...
More details: http://www.freepatentsonline.com/20200202594.pdf ">https://www.freepatentsonline.com/202002025...
Patent: Centroid selection for variable rate shading - AMD
More details: http://www.freepatentsonline.com/20200202605.pdf ">https://www.freepatentsonline.com/202002026...
More details: http://www.freepatentsonline.com/20200202605.pdf ">https://www.freepatentsonline.com/202002026...